This series of pages is intended to make it easier to get started with FPGA MGTs.
MGTs are complicated modules, and each one has a different structure. There is no way around reading the documentation of an MGT in order to properly operate it. Unfortunately, MGTs' documentation is often lengthy and focuses on details, sometimes without explaining what each building block is intended for and how it may assist in implementing a specific project. As many of the parts of an MGT are often irrelevant for a specific task, a lot of time can be wasted reading about the details of a functional block that is eventually not used in the project.
This series of pages will hopefully make this reading easier by explaining the purposes and concepts in relation to an MGT's building blocks. The primary objective of these pages is too keep the explanations short and to focus on the pieces of information that are necessary to generally understand how an MGT operates, and what functional elements are relevant for a specific project.
The pages in this series are listed below. They are ordered according to their level of difficulty, easiest topics first.
- Multi-Gigabit transceivers: An overview
- List of protocols for communication between FPGAs with Multi-Gigabit Trasnsceivers
- A brief introduction to 8b/10b encoding, 64b/66b, 128b/130b etc.
- The PCS: Encoding, gearboxes, Tx/Rx buffers, and more
- The PMA: Transmission and reception of data
- The PMA: OOB signals, electrical idle etc.
- An MGT's Clocking: Explaining the basics