This group of pages discusses timing and timing constraints, starting from the basics. It's a combination of theory, practical suggestions on how to write timing constraints, as well as a lot of examples of timing reports:
- Timing is everything
- The fundamentals of timing in logic design
- The clock period constraint and its timing analysis
- More about the clock period constraint
- The art of Timing Closure
- Strategies for timing closure
- The clock period constraint, and clock objects
- Using Tcl commands to select logic elements
- Timing exceptions
- Timing constraints and clock domain crossing
- Timing constraints for multi-cycle paths
- Choosing the strategy for I/O timing
- I/O timing constraints in SDC syntax
- Validating that the timing constraints are correct
- Using wildcards and -hierarchical in SDC timing constraints